1. Field of the Invention
The present invention relates to a MOS transistor and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, to prevent punch-through in a MOS transistor, an impurity of the same conductivity type as that of a substrate is implanted in a region deeper than a channel formation position. The ions are implanted in the whole active region before a gate electrode is formed. Therefore, the ion-implanted region is symmetrical about the source and drain, and relatively heavily doped impurity regions of the same conductivity type as that of the substrate are also formed in the source and drain formation regions.
One of the factors that determine the speed of the MOS transistor is the junction capacitance of each diffusion layer. As described above, in the MOS transistor, the relatively heavily doped impurity region is also formed on the drain side to which a voltage is generally applied. For this reason, it requires a long time to charge/discharge the capacitance of the drain side in an operation, and an increase in speed of the transistor operation is obstructed.